Semiconductor integrated circuits are typically provided with an electrostatic discharge (ESD) protection circuit so that electrostatic breakdown of an internal circuit is prevented. As a typical ESD protection circuit, used is an RC-triggered power clamp metal oxide semiconductor (MOS) circuit (see, for example, Patent Literature 1). Also, another ESD protection circuit has been proposed which is configured so that an output signal of a CMOS inverter is supplied not only to the gate of a clamp MOS transistor, but also to the well (body) of the clamp MOS transistor (see, for example, Patent Literature 2).